In the integrated circuit industry, it is common practice to test finished ICs before they are shipped to users. To ensure efficiency and low cost, the ICs are typically tested automatically by systems that are collectively referred to as automatic test equipment (ATE). A typical ATE system for testing a finished IC includes a control system such as a personal computer programmed to run tests and process and store test result data automatically. The system also includes various power sources used to power the IC under test and to generate any test signals required for the tests. These can typically include DC as well as AC sources. The system also includes a xe2x80x9ctest headxe2x80x9d in which the IC is mounted for the test. The test head typically includes a device interface board (DIB) that provides the appropriate electronic interface between the IC under test and the rest of the test system. The DIB typically makes connections to the IC via the connection pins on the IC package. Test stimulus signals generated by the test system are applied to the appropriate IC inputs and resulting response signals from the IC outputs are coupled to the test system via the DIB connections to the IC pins.
In present technology, ICs operate at extremely high speed and with very small voltage and power variation tolerances. As a result, the signals used in an ATE system to stimulate an IC under test must also be generated with extreme accuracy and precision. Signal voltage levels must be held to very close tolerances, and signals must be generated to operate at extremely high speed with very close timing tolerances. In addition, the quality of time varying test signals must be very carefully controlled. For example, when testing a digital circuit, it is often desirable to generate a train of square pulses to be applied to the circuit. Because of the high-speed and low-voltage requirements of present digital circuits, the various attributes of the square pulses, such as rise and fall times, duty cycle, symmetry, overshoot, undershoot, etc., must be controlled very accurately.
To generate these various test signals from the power supply outputs, and to accurately process resulting output response signals from the circuit under test, an ATE system typically also includes additional circuitry between the controlling processor and the DIB. This circuitry, commonly referred to as xe2x80x9cpin electronics,xe2x80x9d includes driving circuitry for generating the stimulus signals to be applied to the IC input pins and receiving and detection circuitry for processing response signals from the IC output pins.
Conventional pin driver circuits exhibit various drawbacks when they are called upon to generate the highly accurate stimulus signals required by present high-speed circuits. For example, conventional amplification stages which require current to switch on and off to generate square pulses cannot generate short pulses with symmetry, i.e., substantially equal rise and fall times.
The present invention is directed to a circuit testing apparatus and method that provides circuit testing drive signals with extremely accurate timing and voltage parameters and which exhibit a high level of pulse symmetry. The circuit testing apparatus of the invention includes a controller that controls signals being transferred between the circuit under test and the circuit testing apparatus. A driver circuit in the circuit testing apparatus generates signals to be applied to the circuit under test. The driver circuit includes a high speed slave chain and a DC control loop chain to the circuit under test.
The driver circuit is coupled to a pin on the circuit under test. In general, the pin electronics can include a separate driver circuit for each pin on the circuit under test, with a driver circuit being coupled to each pin, such that separately generated and controllable drive signals can be applied to each pin.
According to one aspect of the present invention, a circuit testing apparatus is provided. The circuit testing apparatus includes a controller for controlling signals being transferred between a circuit under test and the circuit testing apparatus. The circuit testing apparatus further includes a driver circuit for generating signals to be applied to the circuit under test. The driver includes a high speed slave chain and DC control loop chain coupled to the circuit under test. The high speed slave chain receives a differential voltage logic pulse train and converts the logic pulse train into a high speed current steering for producing the drive signal to be applied to the circuit under test. The DC control loop chain provides feedback paths for DC regulation of inputs of the high speed slave chain.
According to another aspect of the present invention, a circuit testing apparatus is provided. The circuit testing apparatus includes a controller for controlling signals being transferred between a circuit under test and the circuit testing apparatus. The circuit testing apparatus further includes a driver means for generating signals to be applied to the circuit under test. The driver includes a high speed slave chain and DC control loop chain coupled to the circuit under test. The high speed slave chain receives a differential voltage logic pulse train and converts the logic pulse train into a high speed current steering for producing the drive signal to be applied to the circuit under test. The DC control loop chain provides feedback paths for DC regulation of inputs of the high speed slave chain.
According to another aspect of the present invention, a method of testing a circuit is provided. The method includes providing a controller for controlling signals being transferred to and from the circuit under test. The method also includes providing a driver circuit coupled to the circuit under test. The method further includes receiving a differential logic pulse train, and converting the logic pulse train into a high speed current steering for producing the drive signal to be applied to the circuit under test.